The scheduling of all the activities involved in a control system is a key task for the successful development of the control system itself, especially in the case of hardware architectures including multi-processor and software architectures including multi-level hierarchical control functions.

EICASLAB is based on time scheduling algorithms for managing multi-processor and multi-hierarchical control architectures of any level of complexity.

Since the Modelling and Like Real-time Simulation phase, the user has to schedule all the activities involved in the control system:

• Plant Area activities;




• Converters activities;




• Mission Area activities;




• Control Area activities.

The control designer must fix a simulation step, which represents the time resolution applied in the simulation of your overall project.

Each activity is characterized by the following scheduling parameters, expressed as a multiple of the simulation step:

• the period is the sample time interval of the activity;




• the duration defines the execution time of the activity;




• the phase determines the time at which the activity starts, with respect to the starting time (t = 0).

In Modelling and Like Real-time Simulation phase, the SIM tool manages the scheduling of activities by means of the EICASLAB scheduler, an advanced engine that allows to run “like real-time” simulations. The EICASLAB scheduler is the core of the time scheduling algorithms that – on the basis of the constraints fixed in the 'Activities Scheduling' window – schedules all the activities and the data transmission over the designed processor network.

The EICASLAB scheduler is directly linked to the clock of the CPU: if the simulation is fast enough it may allow to run a real-time simulation.

In the Rapid Control Prototyping phase, the control algorithms are executed on a multi-core PC platform; for this reason, the user could have to need of reviewing the control scheduling. The new scheduling requires to organize the control functions in threads, that will be distributed on the cores of the multi-core CPU available in the PC platform, thanks to the application in EICASLAB of multi-threading and multi-core programming techniques.